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16:00:00","2026-07-13 16:00:00","2026-06-16 16:00:00","ongoing","private","2026-04-16 08:00:00",{"slug":26,"title":27,"logo":7,"liveUrl":14,"prize":28,"sponsor":7,"description":29,"organizer":18,"startTime":30,"endTime":31,"registrationDeadline":32,"status":33,"dashboardVisibility":23,"createdAt":34},"autumn2025","2025秋季启元人工智能大赛","150,000","“2025秋季启元人工智能大赛”是由启元实验室主办的面向全国人工智能领域开发者、科研人员及高校学生的权威赛事。大赛旨在促进与培养具备工程实践能力和创新能力的优秀人工智能领域开发者、推广国产软硬件技术与生态、助力国家人工智能产业高质量发展。","2025-11-08 08:00:00","2026-01-13 08:00:00","2025-12-30 08:00:00","ended","2025-11-03 08:00:00",{"slug":36,"title":37,"logo":7,"liveUrl":14,"prize":38,"sponsor":7,"description":39,"organizer":18,"startTime":40,"endTime":41,"registrationDeadline":42,"status":33,"dashboardVisibility":23,"createdAt":43},"summer2025","启元人工智能大赛(系统方向)","80,000","启元人工智能大赛由启元实验室主办，其中系统赛道基于启元实验室九源软件栈的相关开源项目，通过拉动开源社区力量，一方面促进国产智能计算生态的发展，另一方面也为人工智能系统方向的学生及从业者提供一个实践平台。","2025-07-08 08:00:00","2025-08-25 08:00:00","2025-07-22 08:00:00","2025-06-22 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08:00:00","2026-10-19 08:00:00","public","2026-10-12 08:00:00",{"id":63,"slug":64,"title":65,"logo":66,"publicLiveEmbedUrl":7,"description":67,"introduction":57,"organizer":18,"coOrganizer":5,"sponsor":68,"startTime":69,"endTime":70,"status":33,"dashboardVisibility":23,"createdAt":71,"updatedAt":72},"019af3f3-e06a-7245-aa8d-37dc99a69c73","winter2025","2025年冬季InfiniTensor大模型与人工智能系统训练营","https:\u002F\u002Foss.infinitensor.com\u002Fprod\u002Fuploads\u002F2025-12\u002F019afc69-b7ca-7805-91fb-605429671c01.png?Expires=1792752557&OSSAccessKeyId=LTAI5t9R6uzvTa69CT92cFvV&Signature=8u%2BaQaeliN4QzF6MZWiB4jHYDCE%3D","由启元实验室发起的InfiniTensor大模型与人工智能系统训练营，面向开源社区、高校及产业界伙伴开放。活动以「普及AI全栈知识技术、培养工程实践与创新型人才、推广国产软硬件技术生态」为核心目标，助力国家人工智能产业高质量发展。 \n","新华三技术有限公司","2025-12-25 08:00:00","2026-03-27 08:00:00","2025-12-06 08:00:00","2026-10-22 20:24:30",{"id":74,"slug":36,"title":75,"logo":76,"publicLiveEmbedUrl":7,"description":77,"introduction":57,"organizer":18,"coOrganizer":5,"sponsor":78,"startTime":79,"endTime":80,"status":81,"dashboardVisibility":23,"createdAt":82,"updatedAt":83},"01980342-208c-7803-b3f3-19e1d31960ba","2025年夏季InfiniTensor大模型与人工智能系统训练营","https:\u002F\u002Foss.infinitensor.com\u002Fprod\u002Fuploads\u002F2025-07\u002F0198045e-28fe-78f0-95fe-23835ce58395.jpg?Expires=1792752557&OSSAccessKeyId=LTAI5t9R6uzvTa69CT92cFvV&Signature=8pXXbnSlNEtVJCJ1e4RzUlqmRn8%3D","InfiniTensor大模型与人工智能系统训练营由启元实验室及清华大学 AI 系统方向团队发起，面向开源社区、高校和产业界，普及人工智能各方面知识和技术，培养相关人才。训练营联合开源项目开发者、学术界大牛、工业界资深工程师参与授课与项目指导。课程采用「线上直播授课 + 在线答疑 + 项目实践辅导 」的方式进行，确保每位同学都能获得充分成长。训练营全程免费，通过视频、直播课、习题和项目实践，在人工智能飞速发展的背景下，为学员提供一窥深层技术的机会。","北京积算科技有限公司","2025-07-14 08:00:00","2025-09-30 08:00:00","upcoming","2025-07-13 08:00:00","2026-10-22 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20:24:49",[44],{"currentItem":105,"processedData":125},{"img":106,"keywords":107,"treeType":44,"description":108,"showStatus":44,"updateTime":109,"type":110,"title":111,"content":112,"nextArticle":113,"createTime":109,"sortOrder":117,"canonicalPath":118,"id":119,"contentType":120,"prevArticle":121},"https:\u002F\u002Foss.infinitensor.com\u002Fprod\u002Fimages\u002FKnowledge_Base\u002FKB_39_fm.jpg?Expires=1792752557&OSSAccessKeyId=LTAI5t9R6uzvTa69CT92cFvV&Signature=tSiLBz%2Be2rkIRsq6B12OuX8kRXY%3D","InfiniTensor,冬季训练营,Triton实战,天数智芯,性能调优","以天数智芯平台为例开展 Triton 实战，讲解算子开发流程、调试方法与性能调优。","2026-10-22 20:38:11",2,"InfiniTensor 冬季训练营 Triton&九齿第五课《天数智芯 Triton 实战》","![](https:\u002F\u002Foss.infinitensor.com\u002Fprod\u002Fimages\u002FKnowledge_Base\u002FKB_39_zw01.jpg?Expires=1792752557&OSSAccessKeyId=LTAI5t9R6uzvTa69CT92cFvV&Signature=lVSk5Ua6PVD74J%2BmMAvQN3VgTeo%3D)\r\n\r\n\r\n2026 年 1 月 27 日，2025 冬季 InfiniTensor 大模型与人工智能系统训练营 Triton&九齿系列第五课《天数智芯 Triton 实战》开讲。\r\n\r\n本节课主讲从 CUDA 兼容到性能优化，天数智芯如何让 Triton 在国产 GPU 上高效运行。\r\n\r\n\r\n## 天数智芯与 Triton 的适配优势\r\n![](https:\u002F\u002Foss.infinitensor.com\u002Fprod\u002Fimages\u002FKnowledge_Base\u002FKB_39_zw02.jpg?Expires=1792752557&OSSAccessKeyId=LTAI5t9R6uzvTa69CT92cFvV&Signature=OkEiqc8yX68lhO1b3KcJoxES8sQ%3D)\r\n\r\n\r\n#### 1. LLVM生态兼容\r\n\r\n- 天数智芯的自研软件栈编译器基于 LLVM 开发，而 Triton 本身也依赖 MLIR 和LLVM等基础设施。这意味着 Triton 的工具链优化流程能与天数智芯编译器无缝对接，无需额外翻译。\r\n\r\n#### 2. GPGPU 架构契合\r\n\r\n- 天数智芯 GPU 采用 GPGPU 架构，与 Triton 最初支持的 NVIDIA GPU、AMD GPU 架构相似，内存模型相似、计算模型一致，因此 Triton 中针对 GPGPU 的中间表示优化手段可直接复用\r\n\r\n#### 3. Triton Kernels 零改写复用\r\n\r\n- 这是对开发者最友好的优势，无需修改代码，Triton 经验可直接迁移。如需进一步提升性能，可针对特定 kernel 进行优化\r\n\r\n\r\n##  天数智芯 Triton 适配\r\n\r\n### 1. Triton 架构分层\r\n- **Kernel 层**：用户编写或自动生成的算子\r\n- **编译器层**：对 kernel 进行基础优化和GPU专用优化\r\n- **LLVM 与硬件后端层**：将 Triton GPU IR 转换为硬件指令\r\n\r\n### 2. 适配工作的三个层面\r\n\r\n![](https:\u002F\u002Foss.infinitensor.com\u002Fprod\u002Fimages\u002FKnowledge_Base\u002FKB_39_zw03.jpg?Expires=1792752557&OSSAccessKeyId=LTAI5t9R6uzvTa69CT92cFvV&Signature=EVThXZZwdsBVAqTSKGJM2AnKpvc%3D)\r\n\r\n\r\n## 天数智芯 Flash Attention 算子优化\r\n\r\n- V0版本：官方实现支持\r\n- V1版本：head_dim 切分优化\r\n- V2版本：转置视图优化\r\n\r\n### Block Tiling\r\n![](https:\u002F\u002Foss.infinitensor.com\u002Fprod\u002Fimages\u002FKnowledge_Base\u002FKB_39_zw04.jpg?Expires=1792752557&OSSAccessKeyId=LTAI5t9R6uzvTa69CT92cFvV&Signature=GXQlgJVmmFpqLjZ4qGv%2BbCH%2FAmA%3D)\r\n\r\n- Grid划分：对 sequence length 维度按block m 切分\r\n- 任务分配：不同线程块并行处理不同的batch、head 和 sequence length 分段\r\n\r\n### V1版本 Block Tiling\r\n\r\n![](https:\u002F\u002Foss.infinitensor.com\u002Fprod\u002Fimages\u002FKnowledge_Base\u002FKB_39_zw05.jpg?Expires=1792752557&OSSAccessKeyId=LTAI5t9R6uzvTa69CT92cFvV&Signature=K8SfZB%2FvVdLrBHxHOqJMUq2ZdHU%3D)\r\n\r\n\r\n#### 1. V1版本 warps per tile\r\n\r\n![](https:\u002F\u002Foss.infinitensor.com\u002Fprod\u002Fimages\u002FKnowledge_Base\u002FKB_39_zw06.jpg?Expires=1792752557&OSSAccessKeyId=LTAI5t9R6uzvTa69CT92cFvV&Signature=Qb%2F%2BATDJ4PgnC5VTSUZo%2BIFXy10%3D)\r\n\r\n![](https:\u002F\u002Foss.infinitensor.com\u002Fprod\u002Fimages\u002FKnowledge_Base\u002FKB_39_zw07.jpg?Expires=1792752557&OSSAccessKeyId=LTAI5t9R6uzvTa69CT92cFvV&Signature=47l8hZGYLRqCCUlklJX7WEgW8Vg%3D)\r\n\r\n\r\n- Warp 垂直排列：每个 warp 负责一个 16×128 的横条\r\n- 优势：\r\n  - 减少跨 Warp 数据交换\r\n  - 避免数据排布转换\r\n  - 提升计算效率\r\n\r\n#### 2. MMA 指令\r\n\r\n![](https:\u002F\u002Foss.infinitensor.com\u002Fprod\u002Fimages\u002FKnowledge_Base\u002FKB_39_zw08.jpg?Expires=1792752557&OSSAccessKeyId=LTAI5t9R6uzvTa69CT92cFvV&Signature=Z6ybC0FkhDYjav3ZkJqruo00vHc%3D)\r\n\r\n* **线程负载计算**：\r\n  - 矩阵 A 总元素量：$16 \times 16 = 256$ 个 FP16 元素。\r\n  - Warp 分配：$256 div 32 (\text{warp size}) = 8$。即**每个线程寄存器需存储 8 个 FP16 元素**。\r\n\r\n\r\n* **寄存器片段布局 (Fragment Layout)**：\r\n  -右侧图表展示了矩阵 A 在 Warp 内的物理映射。\r\n* **非连续分布**：以 **T0 (Thread 0)** 为例（红框标记），它持有的 8 个元素 ($a0 sim a7$) 并非在矩阵中连续排列，而是分散映射。例如：\r\n  - ${a0, a1}$位于 Row 0, Col 0-1。\r\n  - ${a4, a5}$位于 Row 0, Col 8-9。\r\n  - ${a2, a3}$位于 Row 8, Col 0-1。\r\n\r\n![](https:\u002F\u002Foss.infinitensor.com\u002Fprod\u002Fimages\u002FKnowledge_Base\u002FKB_39_zw09.jpg?Expires=1792752557&OSSAccessKeyId=LTAI5t9R6uzvTa69CT92cFvV&Signature=OQYFU6K4FBfdDJnprrrWS5nzxZQ%3D)\r\n\r\n* **线程负载计算**：\r\n  - 矩阵 c 总元素量：$16 \times 8 = 128$ 个 FP16 元素。\r\n  - Warp 分配：$128 div 32 (\text{warp size}) = 4$。即**每个线程寄存器需存储 4 个 FP16 元素**。\r\n* **寄存器片段布局 (Fragment Layout)**：\r\n  - 右侧图表展示了这 4 个元素在物理空间中的映射逻辑，以 T0 (Thread 0) 为例（红框标记）\r\n  - 寄存器分配：包含两个 .f16x2 寄存器，分别存储 ${b0, b1}$ 和 ${b2, b3}$。\r\n  - 空间映射 (Layout)：${b0, b1}$：映射在矩阵的 Row 0, Col 0 位置。${b2, b3}$：映射在矩阵的 Row 8, Col 0 位置。\r\n  - 布局特点：数据并非连续排列，而是存在 8 行的跨度 (Stride)。T0 虽然只负责第 0 列的数据，但被拆分到了矩阵的上半部分（Row 0）和下半部分（Row 8）。这种特定的 Swizzling 布局是为了配合 Tensor Core 在 K 维度上的高效数据读取与累加。\r\n\r\n![](https:\u002F\u002Foss.infinitensor.com\u002Fprod\u002Fimages\u002FKnowledge_Base\u002FKB_39_zw10.jpg?Expires=1792752557&OSSAccessKeyId=LTAI5t9R6uzvTa69CT92cFvV&Signature=FwLY6S%2B%2F7X%2Bgocevk9brU8OrXnM%3D)\r\n\r\n* **线程负载计算**：\r\n  - 矩阵 B 总元素量：$16 \times 8 = 128$ 个 FP32 元素。\r\n  - Warp 分配：$128 div 32 (\text{warp size}) = 4$。即**每个线程寄存器需存储 4 个 FP32 元素**。\r\n* **物理映射**：\r\n  - 空间分布：与矩阵 B 的布局高度一致。Thread 0 (红框) 持有的 ${c0, c1}$ 位于 Row 0, Col 0-1，而 ${c2, c3}$ 位于 Row 8, Col 0-1。\r\n  - 意义：这种布局确保了计算结果可以直接作为下一次 MMA 运算的输入（Accumulator），或者通过简单的 Shuffle 操作存回 Shared Memory\u002FGlobal Memory。\r\n\r\n![](https:\u002F\u002Foss.infinitensor.com\u002Fprod\u002Fimages\u002FKnowledge_Base\u002FKB_39_zw11.jpg?Expires=1792752557&OSSAccessKeyId=LTAI5t9R6uzvTa69CT92cFvV&Signature=nM0jN7QA%2FHF5bylUaYNg%2Bianx0k%3D)\r\n\r\n\r\n#### 3. 天数 FP16 TCU 指令\r\n\r\n![](https:\u002F\u002Foss.infinitensor.com\u002Fprod\u002Fimages\u002FKnowledge_Base\u002FKB_39_zw12.jpg?Expires=1792752557&OSSAccessKeyId=LTAI5t9R6uzvTa69CT92cFvV&Signature=JptJSOcnpAyeHqvYhEgB0Zqlsl8%3D)\r\n\r\n\r\n\r\n#### 4. 延时归约优化\r\n- 原流程：沿 k 遍历，每步分线程内归约、warp 内线程归约，与前步结果求和更新部分和，每步都做归约操作\r\n- 延时归约：去掉 warp 内归约，放到循环最后，中间计算结果更新为部分累加和（Partial Sum），循环结束后不同线程结果求和得最终正确结果，省去每步开销\r\n\r\n![](https:\u002F\u002Foss.infinitensor.com\u002Fprod\u002Fimages\u002FKnowledge_Base\u002FKB_39_zw13.jpg?Expires=1792752557&OSSAccessKeyId=LTAI5t9R6uzvTa69CT92cFvV&Signature=RbNMY95wfLmo43MLem%2FIqy%2BLhYA%3D)\r\n\r\n\r\n### V2 版本 Block Tiling\r\n\r\n![](https:\u002F\u002Foss.infinitensor.com\u002Fprod\u002Fimages\u002FKnowledge_Base\u002FKB_39_zw14.jpg?Expires=1792752557&OSSAccessKeyId=LTAI5t9R6uzvTa69CT92cFvV&Signature=xFmg%2B5Dt5eGukG1TfnZJT6Nudeg%3D)\r\n\r\n- **V2版本更快的原因**\r\n  - Reduce 方向改变：减少中间指令数量\r\n  - 避免 MMA 结果在不同 Operand 表示之间的额外转换，降低数据重排与指令开销\r\n\r\n\r\n## 总结\r\n\r\n天数智芯通过深度适配Triton，为国产 GPU提供了高效的算子开发解决方案，使得开发者能够轻松将现有 Triton 代码迁移到天数智芯 GPU 上。随着更多算子的适配和优化，天数智芯 GPU 的生态将更加丰富，为国产 AI 芯片的发展提供强大支持。\r\n\r\n\r\n\r\n![2025冬季训练营课程表](https:\u002F\u002Foss.infinitensor.com\u002Fprod\u002Fimages\u002FKnowledge_Base\u002FKB_kcb.jpg?Expires=1792752557&OSSAccessKeyId=LTAI5t9R6uzvTa69CT92cFvV&Signature=wEJmtfwJ%2F%2BVy5lTwT4sQ%2Bl0MfRI%3D)\r\n\r\n### 💡 学习贴士\r\n更多细节及完整课程内容，请观看直播或查看课程回放。\r\n\r\n链接：https:\u002F\u002Fwww.infinitensor.com\u002Fcamp\u002Fwinter2025\r\n\r\n### 📚 训练营报名持续进行中\r\n扫码报名与加入群聊，或点击 **「阅读原文」** 直达官网报名\r\n\r\n\r\n![](https:\u002F\u002Foss.infinitensor.com\u002Fprod\u002Fimages\u002FKnowledge_Base\u002FKB_ewm.jpg?Expires=1792752557&OSSAccessKeyId=LTAI5t9R6uzvTa69CT92cFvV&Signature=LSV81XMPzbIA0JTv5RzP%2Fjg4DyQ%3D)",{"publishTime":7,"createTime":109,"canonicalPath":114,"id":115,"title":116},"\u002Fstudy-material\u002Fstudy-38","study-38","InfiniTensor 冬季训练营推理引擎第四课《大模型计算优化与分布式推理》",70,"\u002Fstudy-material\u002Fstudy-39","study-39","markdown",{"publishTime":7,"createTime":109,"canonicalPath":122,"id":123,"title":124},"\u002Fstudy-material\u002Fstudy-40","study-40","InfiniTensor 冬季训练营 CUDA 编程第六课《异步并行、底层控制与系统优化》",{"htmlContent":126,"headings":127},"\u003Cp>\u003Cimg src=\"https:\u002F\u002Foss.infinitensor.com\u002Fprod\u002Fimages\u002FKnowledge_Base\u002FKB_39_zw01.jpg?Expires=1792752557&OSSAccessKeyId=LTAI5t9R6uzvTa69CT92cFvV&Signature=lVSk5Ua6PVD74J%2BmMAvQN3VgTeo%3D\" alt=\"\">\u003C\u002Fp>\n\u003Cp>2026 年 1 月 27 日，2025 冬季 InfiniTensor 大模型与人工智能系统训练营 Triton&九齿系列第五课《天数智芯 Triton 实战》开讲。\u003C\u002Fp>\n\u003Cp>本节课主讲从 CUDA 兼容到性能优化，天数智芯如何让 Triton 在国产 GPU 上高效运行。\u003C\u002Fp>\n\u003Ch2 id=\"天数智芯与-triton-的适配优势\">\u003Ca class=\"anchor\" href=\"#天数智芯与-triton-的适配优势\" aria-label=\"跳转到标题：天数智芯与 Triton 的适配优势\">\u003Cspan class=\"octicon octicon-link\">\u003C\u002Fspan>\u003C\u002Fa>天数智芯与 Triton 的适配优势\u003C\u002Fh2>\u003Cp>\u003Cimg src=\"https:\u002F\u002Foss.infinitensor.com\u002Fprod\u002Fimages\u002FKnowledge_Base\u002FKB_39_zw02.jpg?Expires=1792752557&OSSAccessKeyId=LTAI5t9R6uzvTa69CT92cFvV&Signature=OkEiqc8yX68lhO1b3KcJoxES8sQ%3D\" alt=\"\">\u003C\u002Fp>\n\u003Ch4 id=\"1-llvm生态兼容\">\u003Ca class=\"anchor\" href=\"#1-llvm生态兼容\" aria-label=\"跳转到标题：1. LLVM生态兼容\">\u003Cspan class=\"octicon octicon-link\">\u003C\u002Fspan>\u003C\u002Fa>1. LLVM生态兼容\u003C\u002Fh4>\u003Cul>\n\u003Cli>天数智芯的自研软件栈编译器基于 LLVM 开发，而 Triton 本身也依赖 MLIR 和LLVM等基础设施。这意味着 Triton 的工具链优化流程能与天数智芯编译器无缝对接，无需额外翻译。\u003C\u002Fli>\n\u003C\u002Ful>\n\u003Ch4 id=\"2-gpgpu-架构契合\">\u003Ca class=\"anchor\" href=\"#2-gpgpu-架构契合\" aria-label=\"跳转到标题：2. GPGPU 架构契合\">\u003Cspan class=\"octicon octicon-link\">\u003C\u002Fspan>\u003C\u002Fa>2. GPGPU 架构契合\u003C\u002Fh4>\u003Cul>\n\u003Cli>天数智芯 GPU 采用 GPGPU 架构，与 Triton 最初支持的 NVIDIA GPU、AMD GPU 架构相似，内存模型相似、计算模型一致，因此 Triton 中针对 GPGPU 的中间表示优化手段可直接复用\u003C\u002Fli>\n\u003C\u002Ful>\n\u003Ch4 id=\"3-triton-kernels-零改写复用\">\u003Ca class=\"anchor\" href=\"#3-triton-kernels-零改写复用\" aria-label=\"跳转到标题：3. Triton Kernels 零改写复用\">\u003Cspan class=\"octicon octicon-link\">\u003C\u002Fspan>\u003C\u002Fa>3. Triton Kernels 零改写复用\u003C\u002Fh4>\u003Cul>\n\u003Cli>这是对开发者最友好的优势，无需修改代码，Triton 经验可直接迁移。如需进一步提升性能，可针对特定 kernel 进行优化\u003C\u002Fli>\n\u003C\u002Ful>\n\u003Ch2 id=\"天数智芯-triton-适配\">\u003Ca class=\"anchor\" href=\"#天数智芯-triton-适配\" aria-label=\"跳转到标题：天数智芯 Triton 适配\">\u003Cspan class=\"octicon octicon-link\">\u003C\u002Fspan>\u003C\u002Fa>天数智芯 Triton 适配\u003C\u002Fh2>\u003Ch3 id=\"1-triton-架构分层\">\u003Ca class=\"anchor\" href=\"#1-triton-架构分层\" aria-label=\"跳转到标题：1. Triton 架构分层\">\u003Cspan class=\"octicon octicon-link\">\u003C\u002Fspan>\u003C\u002Fa>1. Triton 架构分层\u003C\u002Fh3>\u003Cul>\n\u003Cli>\u003Cstrong>Kernel 层\u003C\u002Fstrong>：用户编写或自动生成的算子\u003C\u002Fli>\n\u003Cli>\u003Cstrong>编译器层\u003C\u002Fstrong>：对 kernel 进行基础优化和GPU专用优化\u003C\u002Fli>\n\u003Cli>\u003Cstrong>LLVM 与硬件后端层\u003C\u002Fstrong>：将 Triton GPU IR 转换为硬件指令\u003C\u002Fli>\n\u003C\u002Ful>\n\u003Ch3 id=\"2-适配工作的三个层面\">\u003Ca class=\"anchor\" href=\"#2-适配工作的三个层面\" aria-label=\"跳转到标题：2. 适配工作的三个层面\">\u003Cspan class=\"octicon octicon-link\">\u003C\u002Fspan>\u003C\u002Fa>2. 适配工作的三个层面\u003C\u002Fh3>\u003Cp>\u003Cimg src=\"https:\u002F\u002Foss.infinitensor.com\u002Fprod\u002Fimages\u002FKnowledge_Base\u002FKB_39_zw03.jpg?Expires=1792752557&OSSAccessKeyId=LTAI5t9R6uzvTa69CT92cFvV&Signature=EVThXZZwdsBVAqTSKGJM2AnKpvc%3D\" alt=\"\">\u003C\u002Fp>\n\u003Ch2 id=\"天数智芯-flash-attention-算子优化\">\u003Ca class=\"anchor\" href=\"#天数智芯-flash-attention-算子优化\" aria-label=\"跳转到标题：天数智芯 Flash Attention 算子优化\">\u003Cspan class=\"octicon octicon-link\">\u003C\u002Fspan>\u003C\u002Fa>天数智芯 Flash Attention 算子优化\u003C\u002Fh2>\u003Cul>\n\u003Cli>V0版本：官方实现支持\u003C\u002Fli>\n\u003Cli>V1版本：head_dim 切分优化\u003C\u002Fli>\n\u003Cli>V2版本：转置视图优化\u003C\u002Fli>\n\u003C\u002Ful>\n\u003Ch3 id=\"block-tiling\">\u003Ca class=\"anchor\" href=\"#block-tiling\" aria-label=\"跳转到标题：Block Tiling\">\u003Cspan class=\"octicon octicon-link\">\u003C\u002Fspan>\u003C\u002Fa>Block Tiling\u003C\u002Fh3>\u003Cp>\u003Cimg src=\"https:\u002F\u002Foss.infinitensor.com\u002Fprod\u002Fimages\u002FKnowledge_Base\u002FKB_39_zw04.jpg?Expires=1792752557&OSSAccessKeyId=LTAI5t9R6uzvTa69CT92cFvV&Signature=GXQlgJVmmFpqLjZ4qGv%2BbCH%2FAmA%3D\" alt=\"\">\u003C\u002Fp>\n\u003Cul>\n\u003Cli>Grid划分：对 sequence length 维度按block m 切分\u003C\u002Fli>\n\u003Cli>任务分配：不同线程块并行处理不同的batch、head 和 sequence length 分段\u003C\u002Fli>\n\u003C\u002Ful>\n\u003Ch3 id=\"v1版本-block-tiling\">\u003Ca class=\"anchor\" href=\"#v1版本-block-tiling\" aria-label=\"跳转到标题：V1版本 Block Tiling\">\u003Cspan class=\"octicon octicon-link\">\u003C\u002Fspan>\u003C\u002Fa>V1版本 Block Tiling\u003C\u002Fh3>\u003Cp>\u003Cimg src=\"https:\u002F\u002Foss.infinitensor.com\u002Fprod\u002Fimages\u002FKnowledge_Base\u002FKB_39_zw05.jpg?Expires=1792752557&OSSAccessKeyId=LTAI5t9R6uzvTa69CT92cFvV&Signature=K8SfZB%2FvVdLrBHxHOqJMUq2ZdHU%3D\" alt=\"\">\u003C\u002Fp>\n\u003Ch4 id=\"1-v1版本-warps-per-tile\">\u003Ca class=\"anchor\" href=\"#1-v1版本-warps-per-tile\" aria-label=\"跳转到标题：1. V1版本 warps per tile\">\u003Cspan class=\"octicon octicon-link\">\u003C\u002Fspan>\u003C\u002Fa>1. V1版本 warps per tile\u003C\u002Fh4>\u003Cp>\u003Cimg src=\"https:\u002F\u002Foss.infinitensor.com\u002Fprod\u002Fimages\u002FKnowledge_Base\u002FKB_39_zw06.jpg?Expires=1792752557&OSSAccessKeyId=LTAI5t9R6uzvTa69CT92cFvV&Signature=Qb%2F%2BATDJ4PgnC5VTSUZo%2BIFXy10%3D\" alt=\"\">\u003C\u002Fp>\n\u003Cp>\u003Cimg src=\"https:\u002F\u002Foss.infinitensor.com\u002Fprod\u002Fimages\u002FKnowledge_Base\u002FKB_39_zw07.jpg?Expires=1792752557&OSSAccessKeyId=LTAI5t9R6uzvTa69CT92cFvV&Signature=47l8hZGYLRqCCUlklJX7WEgW8Vg%3D\" alt=\"\">\u003C\u002Fp>\n\u003Cul>\n\u003Cli>Warp 垂直排列：每个 warp 负责一个 16×128 的横条\u003C\u002Fli>\n\u003Cli>优势：\u003Cul>\n\u003Cli>减少跨 Warp 数据交换\u003C\u002Fli>\n\u003Cli>避免数据排布转换\u003C\u002Fli>\n\u003Cli>提升计算效率\u003C\u002Fli>\n\u003C\u002Ful>\n\u003C\u002Fli>\n\u003C\u002Ful>\n\u003Ch4 id=\"2-mma-指令\">\u003Ca class=\"anchor\" href=\"#2-mma-指令\" aria-label=\"跳转到标题：2. MMA 指令\">\u003Cspan class=\"octicon octicon-link\">\u003C\u002Fspan>\u003C\u002Fa>2. MMA 指令\u003C\u002Fh4>\u003Cp>\u003Cimg src=\"https:\u002F\u002Foss.infinitensor.com\u002Fprod\u002Fimages\u002FKnowledge_Base\u002FKB_39_zw08.jpg?Expires=1792752557&OSSAccessKeyId=LTAI5t9R6uzvTa69CT92cFvV&Signature=Z6ybC0FkhDYjav3ZkJqruo00vHc%3D\" alt=\"\">\u003C\u002Fp>\n\u003Cul>\n\u003Cli>\u003Cp>\u003Cstrong>线程负载计算\u003C\u002Fstrong>：\u003C\u002Fp>\n\u003Cul>\n\u003Cli>矩阵 A 总元素量：$16     imes 16 = 256$ 个 FP16 元素。\u003C\u002Fli>\n\u003Cli>Warp 分配：$256 div 32 (    ext{warp size}) = 8$。即\u003Cstrong>每个线程寄存器需存储 8 个 FP16 元素\u003C\u002Fstrong>。\u003C\u002Fli>\n\u003C\u002Ful>\n\u003C\u002Fli>\n\u003Cli>\u003Cp>\u003Cstrong>寄存器片段布局 (Fragment Layout)\u003C\u002Fstrong>：\u003Cbr>-右侧图表展示了矩阵 A 在 Warp 内的物理映射。\u003C\u002Fp>\n\u003C\u002Fli>\n\u003Cli>\u003Cp>\u003Cstrong>非连续分布\u003C\u002Fstrong>：以 \u003Cstrong>T0 (Thread 0)\u003C\u002Fstrong> 为例（红框标记），它持有的 8 个元素 ($a0 sim a7$) 并非在矩阵中连续排列，而是分散映射。例如：\u003C\u002Fp>\n\u003Cul>\n\u003Cli>${a0, a1}$位于 Row 0, Col 0-1。\u003C\u002Fli>\n\u003Cli>${a4, a5}$位于 Row 0, Col 8-9。\u003C\u002Fli>\n\u003Cli>${a2, a3}$位于 Row 8, Col 0-1。\u003C\u002Fli>\n\u003C\u002Ful>\n\u003C\u002Fli>\n\u003C\u002Ful>\n\u003Cp>\u003Cimg src=\"https:\u002F\u002Foss.infinitensor.com\u002Fprod\u002Fimages\u002FKnowledge_Base\u002FKB_39_zw09.jpg?Expires=1792752557&OSSAccessKeyId=LTAI5t9R6uzvTa69CT92cFvV&Signature=OQYFU6K4FBfdDJnprrrWS5nzxZQ%3D\" alt=\"\">\u003C\u002Fp>\n\u003Cul>\n\u003Cli>\u003Cstrong>线程负载计算\u003C\u002Fstrong>：\u003Cul>\n\u003Cli>矩阵 c 总元素量：$16     imes 8 = 128$ 个 FP16 元素。\u003C\u002Fli>\n\u003Cli>Warp 分配：$128 div 32 (    ext{warp size}) = 4$。即\u003Cstrong>每个线程寄存器需存储 4 个 FP16 元素\u003C\u002Fstrong>。\u003C\u002Fli>\n\u003C\u002Ful>\n\u003C\u002Fli>\n\u003Cli>\u003Cstrong>寄存器片段布局 (Fragment Layout)\u003C\u002Fstrong>：\u003Cul>\n\u003Cli>右侧图表展示了这 4 个元素在物理空间中的映射逻辑，以 T0 (Thread 0) 为例（红框标记）\u003C\u002Fli>\n\u003Cli>寄存器分配：包含两个 .f16x2 寄存器，分别存储 ${b0, b1}$ 和 ${b2, b3}$。\u003C\u002Fli>\n\u003Cli>空间映射 (Layout)：${b0, b1}$：映射在矩阵的 Row 0, Col 0 位置。${b2, b3}$：映射在矩阵的 Row 8, Col 0 位置。\u003C\u002Fli>\n\u003Cli>布局特点：数据并非连续排列，而是存在 8 行的跨度 (Stride)。T0 虽然只负责第 0 列的数据，但被拆分到了矩阵的上半部分（Row 0）和下半部分（Row 8）。这种特定的 Swizzling 布局是为了配合 Tensor Core 在 K 维度上的高效数据读取与累加。\u003C\u002Fli>\n\u003C\u002Ful>\n\u003C\u002Fli>\n\u003C\u002Ful>\n\u003Cp>\u003Cimg src=\"https:\u002F\u002Foss.infinitensor.com\u002Fprod\u002Fimages\u002FKnowledge_Base\u002FKB_39_zw10.jpg?Expires=1792752557&OSSAccessKeyId=LTAI5t9R6uzvTa69CT92cFvV&Signature=FwLY6S%2B%2F7X%2Bgocevk9brU8OrXnM%3D\" alt=\"\">\u003C\u002Fp>\n\u003Cul>\n\u003Cli>\u003Cstrong>线程负载计算\u003C\u002Fstrong>：\u003Cul>\n\u003Cli>矩阵 B 总元素量：$16     imes 8 = 128$ 个 FP32 元素。\u003C\u002Fli>\n\u003Cli>Warp 分配：$128 div 32 (    ext{warp size}) = 4$。即\u003Cstrong>每个线程寄存器需存储 4 个 FP32 元素\u003C\u002Fstrong>。\u003C\u002Fli>\n\u003C\u002Ful>\n\u003C\u002Fli>\n\u003Cli>\u003Cstrong>物理映射\u003C\u002Fstrong>：\u003Cul>\n\u003Cli>空间分布：与矩阵 B 的布局高度一致。Thread 0 (红框) 持有的 ${c0, c1}$ 位于 Row 0, Col 0-1，而 ${c2, c3}$ 位于 Row 8, Col 0-1。\u003C\u002Fli>\n\u003Cli>意义：这种布局确保了计算结果可以直接作为下一次 MMA 运算的输入（Accumulator），或者通过简单的 Shuffle 操作存回 Shared Memory\u002FGlobal Memory。\u003C\u002Fli>\n\u003C\u002Ful>\n\u003C\u002Fli>\n\u003C\u002Ful>\n\u003Cp>\u003Cimg src=\"https:\u002F\u002Foss.infinitensor.com\u002Fprod\u002Fimages\u002FKnowledge_Base\u002FKB_39_zw11.jpg?Expires=1792752557&OSSAccessKeyId=LTAI5t9R6uzvTa69CT92cFvV&Signature=nM0jN7QA%2FHF5bylUaYNg%2Bianx0k%3D\" alt=\"\">\u003C\u002Fp>\n\u003Ch4 id=\"3-天数-fp16-tcu-指令\">\u003Ca class=\"anchor\" href=\"#3-天数-fp16-tcu-指令\" aria-label=\"跳转到标题：3. 天数 FP16 TCU 指令\">\u003Cspan class=\"octicon octicon-link\">\u003C\u002Fspan>\u003C\u002Fa>3. 天数 FP16 TCU 指令\u003C\u002Fh4>\u003Cp>\u003Cimg src=\"https:\u002F\u002Foss.infinitensor.com\u002Fprod\u002Fimages\u002FKnowledge_Base\u002FKB_39_zw12.jpg?Expires=1792752557&OSSAccessKeyId=LTAI5t9R6uzvTa69CT92cFvV&Signature=JptJSOcnpAyeHqvYhEgB0Zqlsl8%3D\" alt=\"\">\u003C\u002Fp>\n\u003Ch4 id=\"4-延时归约优化\">\u003Ca class=\"anchor\" href=\"#4-延时归约优化\" aria-label=\"跳转到标题：4. 延时归约优化\">\u003Cspan class=\"octicon octicon-link\">\u003C\u002Fspan>\u003C\u002Fa>4. 延时归约优化\u003C\u002Fh4>\u003Cul>\n\u003Cli>原流程：沿 k 遍历，每步分线程内归约、warp 内线程归约，与前步结果求和更新部分和，每步都做归约操作\u003C\u002Fli>\n\u003Cli>延时归约：去掉 warp 内归约，放到循环最后，中间计算结果更新为部分累加和（Partial Sum），循环结束后不同线程结果求和得最终正确结果，省去每步开销\u003C\u002Fli>\n\u003C\u002Ful>\n\u003Cp>\u003Cimg src=\"https:\u002F\u002Foss.infinitensor.com\u002Fprod\u002Fimages\u002FKnowledge_Base\u002FKB_39_zw13.jpg?Expires=1792752557&OSSAccessKeyId=LTAI5t9R6uzvTa69CT92cFvV&Signature=RbNMY95wfLmo43MLem%2FIqy%2BLhYA%3D\" alt=\"\">\u003C\u002Fp>\n\u003Ch3 id=\"v2-版本-block-tiling\">\u003Ca class=\"anchor\" href=\"#v2-版本-block-tiling\" aria-label=\"跳转到标题：V2 版本 Block Tiling\">\u003Cspan class=\"octicon octicon-link\">\u003C\u002Fspan>\u003C\u002Fa>V2 版本 Block Tiling\u003C\u002Fh3>\u003Cp>\u003Cimg src=\"https:\u002F\u002Foss.infinitensor.com\u002Fprod\u002Fimages\u002FKnowledge_Base\u002FKB_39_zw14.jpg?Expires=1792752557&OSSAccessKeyId=LTAI5t9R6uzvTa69CT92cFvV&Signature=xFmg%2B5Dt5eGukG1TfnZJT6Nudeg%3D\" alt=\"\">\u003C\u002Fp>\n\u003Cul>\n\u003Cli>\u003Cstrong>V2版本更快的原因\u003C\u002Fstrong>\u003Cul>\n\u003Cli>Reduce 方向改变：减少中间指令数量\u003C\u002Fli>\n\u003Cli>避免 MMA 结果在不同 Operand 表示之间的额外转换，降低数据重排与指令开销\u003C\u002Fli>\n\u003C\u002Ful>\n\u003C\u002Fli>\n\u003C\u002Ful>\n\u003Ch2 id=\"总结\">\u003Ca class=\"anchor\" href=\"#总结\" aria-label=\"跳转到标题：总结\">\u003Cspan class=\"octicon octicon-link\">\u003C\u002Fspan>\u003C\u002Fa>总结\u003C\u002Fh2>\u003Cp>天数智芯通过深度适配Triton，为国产 GPU提供了高效的算子开发解决方案，使得开发者能够轻松将现有 Triton 代码迁移到天数智芯 GPU 上。随着更多算子的适配和优化，天数智芯 GPU 的生态将更加丰富，为国产 AI 芯片的发展提供强大支持。\u003C\u002Fp>\n\u003Cp>\u003Cimg src=\"https:\u002F\u002Foss.infinitensor.com\u002Fprod\u002Fimages\u002FKnowledge_Base\u002FKB_kcb.jpg?Expires=1792752557&OSSAccessKeyId=LTAI5t9R6uzvTa69CT92cFvV&Signature=wEJmtfwJ%2F%2BVy5lTwT4sQ%2Bl0MfRI%3D\" alt=\"2025冬季训练营课程表\">\u003C\u002Fp>\n\u003Ch3 id=\"学习贴士\">\u003Ca class=\"anchor\" href=\"#学习贴士\" aria-label=\"跳转到标题：💡 学习贴士\">\u003Cspan class=\"octicon octicon-link\">\u003C\u002Fspan>\u003C\u002Fa>💡 学习贴士\u003C\u002Fh3>\u003Cp>更多细节及完整课程内容，请观看直播或查看课程回放。\u003C\u002Fp>\n\u003Cp>链接：\u003Ca href=\"https:\u002F\u002Fwww.infinitensor.com\u002Fcamp\u002Fwinter2025\">https:\u002F\u002Fwww.infinitensor.com\u002Fcamp\u002Fwinter2025\u003C\u002Fa>\u003C\u002Fp>\n\u003Ch3 id=\"训练营报名持续进行中\">\u003Ca class=\"anchor\" href=\"#训练营报名持续进行中\" aria-label=\"跳转到标题：📚 训练营报名持续进行中\">\u003Cspan class=\"octicon octicon-link\">\u003C\u002Fspan>\u003C\u002Fa>📚 训练营报名持续进行中\u003C\u002Fh3>\u003Cp>扫码报名与加入群聊，或点击 \u003Cstrong>「阅读原文」\u003C\u002Fstrong> 直达官网报名\u003C\u002Fp>\n\u003Cp>\u003Cimg src=\"https:\u002F\u002Foss.infinitensor.com\u002Fprod\u002Fimages\u002FKnowledge_Base\u002FKB_ewm.jpg?Expires=1792752557&OSSAccessKeyId=LTAI5t9R6uzvTa69CT92cFvV&Signature=LSV81XMPzbIA0JTv5RzP%2Fjg4DyQ%3D\" alt=\"\">\u003C\u002Fp>\n",[128,131,135,138,141,144,147,150,153,156,159,162,165,168,171,174,176,179],{"id":129,"text":130,"level":110},"天数智芯与-triton-的适配优势","天数智芯与 Triton 的适配优势",{"id":132,"text":133,"level":134},"1-llvm生态兼容","1. LLVM生态兼容",4,{"id":136,"text":137,"level":134},"2-gpgpu-架构契合","2. GPGPU 架构契合",{"id":139,"text":140,"level":134},"3-triton-kernels-零改写复用","3. Triton Kernels 零改写复用",{"id":142,"text":143,"level":110},"天数智芯-triton-适配","天数智芯 Triton 适配",{"id":145,"text":146,"level":9},"1-triton-架构分层","1. Triton 架构分层",{"id":148,"text":149,"level":9},"2-适配工作的三个层面","2. 适配工作的三个层面",{"id":151,"text":152,"level":110},"天数智芯-flash-attention-算子优化","天数智芯 Flash Attention 算子优化",{"id":154,"text":155,"level":9},"block-tiling","Block Tiling",{"id":157,"text":158,"level":9},"v1版本-block-tiling","V1版本 Block Tiling",{"id":160,"text":161,"level":134},"1-v1版本-warps-per-tile","1. V1版本 warps per tile",{"id":163,"text":164,"level":134},"2-mma-指令","2. MMA 指令",{"id":166,"text":167,"level":134},"3-天数-fp16-tcu-指令","3. 天数 FP16 TCU 指令",{"id":169,"text":170,"level":134},"4-延时归约优化","4. 延时归约优化",{"id":172,"text":173,"level":9},"v2-版本-block-tiling","V2 版本 Block Tiling",{"id":175,"text":175,"level":110},"总结",{"id":177,"text":178,"level":9},"学习贴士","💡 学习贴士",{"id":180,"text":181,"level":9},"训练营报名持续进行中","📚 训练营报名持续进行中"]